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Interfacing Multi-Core CVA6 on the RISC-V Culsans Platform with Lauterbach

– PikeOS, IoT

Enabling Multicore Debugging on Culsans SoC with PikeOS Using Lauterbach TRACE32

In the scope of the ISOLDE project, we’ve been working on integrating PikeOS into a custom System-on-Chip (SoC) platform—Culsans—featuring two CVA6 RISC-V cores. This SoC is deployed on a Genesys2 development board, and a key focus of our effort has been enabling efficient debugging capabilities with Lauterbach's TRACE32, an industry-standard debugging suite.

Debugging is a cornerstone of modern embedded systems development. It helps uncover software issues early, improves reliability, and enhances application performance—essential qualities when developing safety-critical systems with PikeOS.


Platform Overview

Culsans is a dual-core SoC based on the CVA6 architecture. It's synthesized and deployed onto the Genesys2 board using Xilinx's Vivado toolchain. To support PikeOS development effectively, we required full-featured debugging capabilities across both CVA6 cores.


Hardware Integration for Debugging

Integrating Lauterbach debugging support required both hardware and software modifications:

  1. Mapping Debug Signals
    The debug signals from Culsans' RISC-V debug module were routed to the PMOD interface on the Genesys2 board. We defined appropriate constraints within the Vivado project to accommodate this routing (details see: "Constraint Configuration" below).
  2. Bitstream Generation
    We generated the FPGA bitstream configured for dual-core operation and flashed it onto the board.
  3. Debugger Setup
    Using the RISC-V debug cable, we connected the PMOD interface to the Power Debug module (see "Lauterbach Connection via PMOD" below), which was linked via Ethernet to the host machine running TRACE32 (see "TRACE32 Configuration" below).


Constraint Configuration

## Debug signals to PMOD 
set_property -dict { PACKAGE_PIN AJ27 IOSTANDARD LVCMOS33 } [get_ports { trst_n }];
set_property -dict { PACKAGE_PIN AH30 IOSTANDARD LVCMOS33 } [get_ports { tck }];
set_property -dict { PACKAGE_PIN AD26 IOSTANDARD LVCMOS33 } [get_ports { tdi }];
set_property -dict { PACKAGE_PIN AC26 IOSTANDARD LVCMOS33 } [get_ports { tdo }];
set_property -dict { PACKAGE_PIN AG30 IOSTANDARD LVCMOS33 } [get_ports { tms }];  
set_property -dict { PACKAGE_PIN AK30 IOSTANDARD LVCMOS33 } [get_ports { cpu_resetn }];

TRACE32 Configuration

Once the hardware setup was complete, we used TRACE32 to load and debug PikeOS on Culsans. Below is the key configuration script used in the debugging session:

SYStem.state
AREA.view
List
PER.view
Register.view
MMU.DUMP PageTable 0x80201000

WAIT 3.s

SYS.DETECT.DaisyChain
SYS.JtagClock 10.00
SYS.CPU RV64

SYStem.CONFIG CORE 1. 1.
SYStem.CONFIG CoreNumber 2.
SYStem.CONFIG HART.INDEX 0. 1.
CORE.ASSIGN 1. 2.

First we open the TRACE32 graphical user interface (GUI), then we load the above script to initiate the debug session. This will open several windows. Next, we select Core 0 from right bottom of the main TRACE32 window. Then we set register of the PC to 0x80000000 and load the binary PikeOS.bin to 0x80000000. Then we select Core 1, set the register of the PC to 0x80000000. Lastly, we again select Core 0 and we run the binary. (In terms of Lauterbach script this would be the following script, but we recommend to do it via the GUI to get a feeling of the needed timing offsets that will depend on your particular target.)

SYStem.Attach
Wait 2.s
Core.select 0
Register.Set PC 0x80000000
Data.LOAD.BINARY PikeOS.bin MD:080000000
Core.select 1
Register.Set PC 0x80000000
Core.select 0
GO.

This configuration allows TRACE32 to detect and control both CVA6 cores, load the PikeOS binary, and perform real-time debugging operations.


Lauterbach Connection via PMOD


Outcome

With this setup, we successfully enabled multi-core debugging for the CVA6-based Culsans SoC. The result is a powerful development environment where real-time operating systems like PikeOS can be debugged and optimized on custom RISC-V hardware.


Acknowledgments

This work has been partially funded by the European Union under the ISOLDE project (RIA Chips-JU, Grant Agreement 101112274, Link). We extend our thanks to the contributors and partners involved in bringing this integration to life.


Lauterbach and its Role in SYSGO's Ecosystem

A big thank you goes to Lauterbach! Lauterbach is a long-standing technology partner of SYSGO, and its TRACE32 debugging tools are widely used in safety- and security-critical embedded systems development. The toolchain provides deep insight into system behavior, including kernel-level analysis and real-time trace capabilities, which are essential for verifying the correctness of PikeOS-based applications. This collaboration ensures that SYSGO's RTOS solutions are fully supported by professional-grade debugging tools, accelerating development cycles and improving system robustness.

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codeo, debugging, fpga, hardware, pikeos, risc-v, tools

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