PikeOS for MPU provides a safe and secure execution environment for medium-sized hardware platforms which do not provide a Memory Management Unit (MMU) and therefore cannot run the standard PikeOS RTOS. PikeOS for MPU is intended to be used on MPU-based SoCs as well as on heterogeneous SoC implementing MMU and MPU clusters.
The new PikeOS for MPU 1.1 release is now available and includes these bug fixes and improvements:
Integration with CODEO 7.4
- and corresponding new licensing server
- PikeOS for MPU 1.1 is now only supported by CODEO 7.4 including the new licensing server LMX 5
- See also the CODEO webpage for improvements and other features (e.g.: Memory Map Tool)
Improvements
- Removed obsolete and MMU related entries in the VMIT
- Updated to GCC 11.3.0
- Utilizing Low Latency Scratchpad Memory
- Splitting an application in multiple memory segments
- Added a tool for MPU region optimization, especially for ARMv7R
DAHLIA NG-Ultra PSP-specific Changes
- Support for the latest DAHLIA NG-Ultra (SoC) suitable for Space applications and its ARM-R52 cores
- Variable DDR RAM size added
- The size of the used DDR Ram can be configured statically in the integration project
- OBT Support added
- Additional timer implementation in FPGA enables scheduler synchronization of major time frames on multiple cores
More information at www.sysgo.com/pikeos-for-mpu
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